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AMIS-39101 Octal High Side Driver with Protection
General Description
The AMIS-39101 is a robust high side driver IC featuring eight independent high current output drive channels along with a number of integrated fault-protection circuits. This highly integrated product is designed for controlled delivery of power to a large variety of loads in industrial applications including motors, relays and LED arrays, among others. With all driver output channels in the conducting state, each channel can source up to 350 mA of continuous current (resistive load). In cases where all output drivers are not active, higher output current per channel can be achieved provided that the thermal limits of the device are not exceeded. Furthermore, in order to minimize system cost each output driver has built-in fly-back diodes. The device withstands short-circuits to ground and supply, respectively. It is designed with an array of integrated protection features including over-temperature and over-current detection and shut down. The integrated charge pump requires only one external capacitor and provides for operation of the critical fault-protection circuitry even in case of low supply voltages. The device can be interfaced to a variety of microcontrollers via the serial interface link, in turn allowing for monitoring and controlling the state of each of the output drivers individually. In this case, at the onset of a potential hazardous situation the drivers are switched off and the diagnostic state of the drivers can be extracted via the serial interface. The device also features a power down mode for reduced power consumption and has high built-in electrostatic discharge (ESD) protection capability for robust operation.
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SOIC 28 PN SUFFIX CASE 751AR
ORDERING INFORMATION
See detailed ordering and shipping information in the package dimensions section on page 2 of this data sheet.
www..commA * Up to 830
* Eight High Side Output Drivers * * * * * * * * * * * * * * * *
Continuous Current per Driver Pair (Resistive Load) Charge Pump with One External Capacitor Serial Interface Short-circuit Protection Diagnostic Features Power-down Mode Internal Thermal Shutdown 3.3 V and 5 V Microcontroller Compliant Excellent System ESD Automotive Compliant SO28 Package with Low RqJA This is a Pb-Free Device* Actuator Control LED Drivers Relays and Solenoids Industrial Process Control Automotive Load Management
*For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
Typical Applications
(c) Semiconductor Components Industries, LLC, 2008
December, 2008 - Rev. 2
1
Publication Order Number: AMIS-39101/D
AMIS-39101
ORDERING INFORMATION
Product Name AMIS39101PNPB4G AMIS39101PNPB4RG NOTE: Package PSOP 300-28 (JEDEC MS-013) PSOP 300-28 (JEDEC MS-013) Shipping Configuration Tube/Tray Tape & Reel Temperature Range -40C to 85C -40C to 85C
For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. VDDN 27 5 Power on Reset OUT1 VS1
4
OUT1
Thermal shutdown
OUT2
6 10
OUT2 VS2
DIN DOUT CLK WR
12 13 2 3 11 Serial interface OUT3 9
OUT3
OUT4 Diagnostic LOGIC Control
OUT4
19
VS3
OUT5 Oscillator www..com OUT6 17 Charge- pump OUT7
18
OUT5
20 24
OUT6 VS4
CAPA1
23
OUT7
Bandgap OUT8
25
OUT8
AMIS-39101
26 1 14 16 7 8 15 21 22 28 PDB TEST1 TEST2 TEST GND1 GND2 GND3 GND4 GND5 GND6
Figure 1. Block Diagram
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AMIS-39101
CVS VS 5V-reg CVCC CVDDN
VCC
VDDN 27 DIN DOUT 12 13 2 3 26
CAPA
CCP
VS1..4 5 10 19 24 4 6 9 11 18 20 23 OUT8 OUT1 Lload1 Cout1 Rload1
17
Micro- controller
CLK WR PDB
AMIS-39101
1 14 16 GND TEST1..2
25 28 22 21 15 8 7 GND1..6
Lload8 Cout8 Rload8
Figure 2. Typical Application Diagram External Components
It is important to properly decouple the power supplies of the chip with external capacitors that have good high frequency properties.
Table 1. EXTERNAL COMPONENTS
Component CVS Ccharge_pump Cout (Note 2) Cout (Note 2) CVDD www..com RLoad LLoad Function Decoupling capacitor; X7R Charge pump capacitor (Note 1) EMC connector on connector Decoupling capacitors; 50 V Decoupling capacitors; 50 V Load resistance Load inductance at maximum current
The VS1, VS2, VS3, and VS4 pins are shorted on the PCB level. Also GND1, GND2, GND3, GND4, GND5, GND6, TEST, TEST1, and TEST2 are shorted on the PCB level.
Min. 100 0.47 1 22 22
Value
Max.
Tol. [%] 20
Units nF nF nF
47
20 20 65 300 350 10
nF nF W mH
1. The capacitor must be placed close to the AMIS-39101 pins on the PCB. 2. Both capacitors are optional and depend on the final application and board layout.
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AMIS-39101
CAPA1 VDDN GND6 GND5 GND4 GND3 TEST2 OUT8 OUT7 OUT6 OUT5 TEST DOUT PDB VS4 VS3 VS2
AMIS-39101
CLK
OUT1
VS1
OUT2
OUT3
TEST1
GND1
GND2
OUT4
WR
Figure 3. Pin Description of the AMIS-39101 Table 2. PIN OUT
Pin 1 2 3 4 5 6 7 8 9 10 11 Name TEST1 CLK WR OUT1 VS1 OUT2 GND1 GND2 OUT3 VS2 OUT4 Connect to GND Schmitt trigger serial interface CLK input Schmitt trigger serial interface write enable input HS driver output VS power supply HS driver output Power ground and thermal dissipation path junction-to-PCB Power ground and thermal dissipation path junction-to-PCB S driver output VS power supply HS driver output Serial interface input pin (Schmitt trigger or CMOS inverter) Digital three state output for serial interface Connect to GND Power ground and thermal dissipation path junction-to-PCB Connect to GND Charge pump capacitor pin HS driver output VS power supply HS driver output Power ground and thermal dissipation path junction-to-PCB Power ground and thermal dissipation path junction-to-PCB HS driver output VS power supply HS driver output Schmitt trigger power-down input Digital supply Power ground and thermal dissipation path junction-to-PCB Description
12 DIN www..com DOUT 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 TEST2 GND3 TEST CAPA1 OUT5 VS3 OUT6 GND4 GND5 OUT7 VS4 OUT8 PDB VDDN GND6
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DIN
AMIS-39101
ELECTRICAL AND ENVIRONMENTAL RATINGS
Table 3. ABSOLUTE MAXIMUM RATINGS
Symbol VDDN VS Iout_ON Iout_OFF I_OUT_VS Vcapa1 Vdig_in VESD VESD Tj Tmr Power supply voltage VS power supply on pins VS1 to VS4, load dump, Pulse 5b 400 ms Maximum output current OUTx pins (Note 3) The HS driver is switched on Maximum output current OUTx pins (Note 3) The HS driver is switched off Maximum output current VS1, 2, 3, 4 pins DC voltage on pin CAPA1 Voltage on digital inputs CLK, PDB, WR, DIN Pins that connect the application (pins VS1..4 and Out1..8) (Note 4) All other pins (Note 4) ESD according charged device model (Note 5) Junction temperature (T<100 hours) Ambient temperature under bias Description Min. GND - 0.3 GND - 0.3 -3000 -350 -700 0 -0.3 -4 -2 -750 -40 -40 Max. 6 35 350 350 3750 VS+16.5 VDDN+0.3 +4 +2 +750 175 85 Unit V V mA mA mA V V kV kV V C C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 3. The power dissipation of the chip must be limited not to exceed the maximum junction temperature Tj. 4. According to HBM standard MIL-STD-883 method 3015.7. 5. According to norm EOS/ESD-STM5.3.1-1999 robotic mode.
Thermal Characteristics Table 4. THERMAL CHARACTERISTICS OF THE PACKAGE
Symbol Rth(vj-a) Description Thermal resistance from junction to ambient in power-SO28 package Conditions In free air Value 145 Unit K/W
Table 5. THERMAL CHARACTERISTICS OF THE AMIS-39101 ON A PCB
PCB Design www..com Two layer (35 mm) Two layer (35 mm) Four layer JEDEC: EIA/JESD51-7 One layer JEDEC: EIA/JESD51-3 Conductivity - Top and Bottom Layer Copper planes according to Figure 4 + 25% copper for the remaining areas Copper planes according to Figure 4 + 0% copper for the remaining areas 25% copper coverage 25% copper coverage Rthja (Note 6) 24 53 25 46 Unit K/W K/W K/W K/W
6. These values are informative only.
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AMIS-39101
7.5
17.9
Top PCB view 5 mm 5 mm 5 mm
114.3
5 mm GND copper
76.2
Bottom PCB view
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114.3
Ground plane GND copper 25 % filled by GND copper
76.2
Figure 4. Layout Recommendation for Thermal Characteristics
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AMIS-39101
Electrical Parameters
Operation outside the operating ranges for extended periods may affect device reliability. Total cumulative dwell time above the maximum operating rating for the power supply or temperature must be less than 100 hours. The parameters below are independent from load type. (see Load Specific Parameters section)
Table 6. OPERATING RANGES
Symbol VDDN Vdig_in VS
(1)
Description Digital power supply voltage Voltage on digital inputs CLK, PDB, WR, DIN VS power supply on Pins VS1 to VS4 Ambient temperature
Min. 3.1 -0.3 3.5 -40
Max. 5.5 VDDN 28 85
Unit V V V C
Tamb
7. The power dissipation of the chip must be limited not to exceed maximum junction temperature Tj of 130C.
Table 7. ELECTRICAL CHARACTERISTICS
Symbol I_VS_norm (Note 8) I_PDB_3.3 (Notes 8 and 9) I_PDB_5 (Notes 8 and 9) I_PDB_MAX_VS I_VDDN_norm (Note 8) R_on_1..8 Description Consumption on VS without load currents In normal mode of operation PDB = high Sum of VS and VDDN consumption in power-down mode of operation PDB = low, VDDN 3.3 V, VS = 24 V, 23C ambient CLK and WR are at VDDN voltage Sum of VS and VDDN consumption in power-down mode of operation PDB = low, VDDN 5 V, VS = 24 V, 23C ambient CLK and WR are at VDDN voltage VS consumption in power-down mode of operation PDB = low, VS = 28 V Consumption on VDDN, In normal mode of operation PDB = high CLK is 500 kHz, VDDN = 5.5 V, VS = 28 V On resistance of the output drivers 1 through 8 t VS = 24 V (nominal VS power supply condition) t VS = 4.6 V (worst case VS power supply condition) Internal over-current limitation of HS driver outputs The time from short of HS driver OUTx pin to GND and the driver deactivation; driver is Off Detection works from VS minimum of 7 V, VDDN minimum is 3 V High TSD threshold for junction temperature (temperature rising) TSD hysteresis for junction temperature 0.65 5,4 Min. Max. 3.5 25 Unit mA mA
40
mA
10 1.6
mA mA W
1 3 2
I_OUT_lim_x (Note 8) T_shortGND_HSdoff
A ms
TSD_H (Note 8) www..com TSD_HYST
130 9
170 18
C C
8. The power dissipation of the chip must be limited not to exceed maximum junction temperature Tj. 9. The cumulative operation time mentioned above may cause permanent device failure.
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AMIS-39101
Load Specific Parameters
High side driver parameters for specific loads are specified in following categories: 1. Parameters for inductive loads up to 350 mH and Tambient up to 85C 2. Parameters for inductive loads up to 300 mH and Tambient up to 85C 3. Parameters for resistive loads and Tambient up to 85C
Table 8. LOAD SPECIFIC CHARACTERISTICS
Symbol Description A. Inductive Load up to 350 mH and Tambiant up to 855C I_OUT_ON_max. Maximum output per HS driver, all eight drivers might be active simultaneously B. Inductive Load up to 300 mH and Tambiant up to 855C I_OUT_ON_max. Maximum output per HS driver, all eight drivers might be active simultaneously C. Resistive Load and Tambiant up to 855C I_OUT_ON_max. Maximum output per HS driver, all eight drivers might be active simultaneously Maximum output per one HS driver, only one can be active Maximum output per HS driver, only two HS drivers from a different pair can be active simultaneously Maximum output per one HS driver pair NOTE: 350 650 500 830 mA mA mA mA 275 mA 240 mA Min. Max. Unit
The parameters above are not tested in production but are guaranteed by design. The overall current capability limitations need to be respected at all times.
The maximum current specified in Table 8 cannot always be obtained. The practically obtainable maximum drive current heavily depends on the thermal design of the application PCB (see Thermal Characteristics section). The available power in the package is: (TSD_H - T_ambient) / Rthja With TSD_H = 130C and Rthja according to Table 5.
Charge Pump
result in the diagnostic register which is then latched in the output register at the rising edge of the WR-pin. Each driver has its corresponding diagnostic bit DIAG_x. By comparing the actual output status (DIAG_x) with the requested driver status (CMD_x) you can diagnose the correct operation of the application according to Table 9.
Thermal Shutdown (TSD) Diagnostic
The high side drivers use floating NDMOS transistors as power devices. To provide the gate voltages for the NDMOS of the high side drivers, a charge pump is integrated. The storage capacitor is an external one. The charge pump www..com typical frequency of 4 MHz. oscillator has DIAGNOSTICS
Short Circuit Diagnostics
In case of TSD activation, all bits DIAG1 to DIAG8 in the serial interface output register are set into the fault state and all drivers will be switched off (see Table 9). The TSD error condition is active until it is reset by the next correct communication on serial interface (i.e. number of clock pulses during WR = 0 is divisible by 8), provided that the device has cooled down under the TSD trip point.
The diagnostic circuit in the AMIS-39101 monitors the actual output status at the pins of the device and stores the
Table 9. OUT DIAGNOSTICS
Requested Driver Status On On Off Off CMD_x 1 1 0 0 Actual Output Status High Low High Low DIAG_x 1 0 1 0 Normal state Short to ground or TSD (Note 11) Short to VS or missing load (Note 10) or TSD (Note 11) Normal state (Note 10) Diagnosis
10. The correct diagnostic information is available after T_diagnostic_OFF time. 11. All 8 diagnostic bits DIAG_x must be in the fault condition to conclude a TSD diagnostic.
Ground Loss
Due to its design, the AMIS-39101 is protected for withstanding module ground loss and driver output shorted to ground at the same time.
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AMIS-39101
Table 10. POWER LOSS
VDDN 0 0 1 1 VS 0 1 0 1 System stopped Start case or sleeping mode with missing VDDN Missing VS supply VDDN normally present System functional Possible Case Action Nothing Eight switches in the off-state Power down consumption on VS Eight switches in the off-state Normal consumption on VDDN Nominal functionality
Serial Interface
The serial interface is used to allow an external microcontroller (MCU) to communicate with the device. The AMIS-39101 always acts as a slave and it can't initiate any transmission.
Serial Interface Transfer Format and Pin Signals
The serial interface block diagram and timing characteristics are shown in Figures 6 and 7. During a serial interface transfer, data is simultaneously sent to and received from the device. A serial clock line (CLK) synchronizes shifting and sampling of the information on the two serial data lines (DIN and DOUT). DOUT signal is the output from the AMIS-39101 to the external MCU and DIN signal is the input from the MCU to the AMIS-39101. The WR-pin selects the AMIS-39101 for communication and can also be used as a chip select (CS) in a multiple-slave system. The WR-pin is active low. If AMIS-39101 is not selected, DOUT is in high impedance state and it does not interfere with serial interface bus activities. Since AMIS-39101 always shifts data out on the rising edge and samples the input data also on the rising edge of the CLK signal, the MCU serial interface port must be configured to match this operation. Serial interface clock idles high between the transferred bytes. The diagram in Figure 7 represents the serial interface timing diagram for 8-bit communication.
www..com Table 11. DIGITAL CHARACTERISTICS Symbol T_CLK T_DATA_ready T_CLK_first T_setup (Note 12) T_hold (Note 12) T_DATA_next T_serial interface_END T_risefall T_WR 12. Guaranteed by design Description
Communication starts with a falling edge on the WR-pin which latches the status of the diagnostic register into the serial interface output register. Subsequently, the CMD_x bits - representing the newly requested driver status - are shifted into the input register and simultaneously, the DIAG_x bits - representing the actual output status - are shifted out. The bits are shifted with x = 1 first and ending with x = 8. At the rising edge of the WR-pin, the data in the input register is latched into the command register and all drivers are simultaneously switching to the newly requested status. Serial interface communication is ended. In case the serial interface master does only support 16-bit communication, then the master must first send 8 clock pulses with dummy DIN data and ignoring the DOUT data. For the next 8 clock pulses the above description can be applied. The required timing for serial to peripheral interface is shown in Table 11.
Min.
Max. 500 2
Unit kHz ms ms ns ns
Maximum applied clock frequency on CLK input Time between falling edge on WR and first bit of data ready on DOUT output (driver going from HZ state to output of first diagnostic bit) First clock edge from falling edge on WR Setup time on DIN Hold time on DIN Time between rising edge on CLK and next bit ready on DOUT (capa on DOUT is 30 pF max.) Time between last CLK edge and WR rising edge Rise and fall time of all applied signals (maximum loading capacitance is 30 pF) Time between two rising edge on WR (repetition of the same command) 1 5 300 3 20 20
100
ns ms
20
ns ms
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AMIS-39101
Normal mode verification: * The command is the set of eight bits loaded via serial interface, which drives the eight HS drivers on or off.
Table 12. DIGITAL CHARACTERISTICS
Symbol T_command_L_max. (Note 13) T_command_R (Note 13) T_PDB_recov Description Minimum time between two opposite commands for inductive loads and maximum HS driver current of 275 mA Minimum time between two opposite commands for resistive loads and maximum HS driver current of 350 mA The time between the rising edge on the PDB input and 90 percent of VS-1V on all HS driver outputs. (all drivers are activated, pure resistive load 35 mA on all outputs) Min. 1 2 1 Max. Unit s ms ms
* The command is activated with rising edge on WR pin.
13. Guaranteed by design
PD 50%
t_PD_recov VOUTi 90% {VBi - 1 V}
t
Figure 5. Timing for Power-down Recovery
DOUT Input Register www..com DIN
CMD8 CMD7 CMD6 CMD5 CMD4 CMD3 CMD2 CMD1 DIAG8 DIAG7 DIAG6 DIAG5 DIAG4 DIAG3 DIAG2 DIAG1
Output Register
Command Register
Diagnostic Register
CMD8 CMD7 CMD6 CMD5 CMD4 CMD3 CMD2 CMD1
DIAG8 DIAG7 DIAG6 DIAG5 DIAG4 DIAG3 DIAG2 DIAG1
DOUT HS driver HS driver OUT1
OUT8
Figure 6. Serial interface Block Diagram
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AMIS-39101
Data transfer from Diagnostic Register to Output Register at falling edge WR Data transfer from Input Register to Command Register at rising edge WR
WR
CLK
1
2
3
4
5
6
7
8
DIN
CMD1 CMD2 CMD3 CMD4 CMD5 CMD6 CMD7 CMD8
DOUT
HiZ DIAG1 DIAG2 DIAG3 DIAG4 DIAG5 DIAG6 DIAG7 DIAG8 X HiZ
OUT
OUT 1 TO 8
Figure 7. Timing Diagram Quality and Reliability
A quality system with certification against TS16949 is maintained. An AEC-Q100 compatible product qualification is performed. Monitoring of production is performed according to the dedicated AMIS specifications for assembly and wafer fabrication.
www..com Table 13. QUALIFICATION QC Test Electrical functional and parametric External visual (mechanical) External visual (cosmetic) NOTE: To product data sheet Conditions
All products are tested using a production test program. Lot conformance to specification in volume production is guaranteed by means of following quality conformance tests:
AQL Level 0.04 0.15
Inspection Level II II
Physical damage to body or leads (e.g. bent leads) Dimensions affecting PCB manufacturability (e.g. coplanarity) Correctness of marking All other cosmetic defects
0.65
II
Each production lot will be accompanied with a Certificate of Conformance.
Company or Product Inquiries
For more information about ON Semiconductor's products or services visit our Web site at http://www.onsemi.com.
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AMIS-39101
PACKAGE DIMENSIONS
SOIC 28 W CASE 751AR-01 ISSUE O
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ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
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AMIS-39101/D

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